Almost two years after its formal introduction, PCI Express 4.0 is finally here. The specification promises higher speeds than the previous generation for internal storage, graphics cards and more. What is PCI Express 4.0 exactly and why is it important to you? Let's look without getting too technical.
To understand PCI Express, we must start with its predecessor. Intel created the original PCI computer bus in 1992. It replaces the EISA and MCA expansion buses in servers, and the VESA local bus in mainstream computers. A bus is a highway on a motherboard that connects components to a computer. There are many buses that serve different purposes, such as the Universal Serial Bus support printers, mice and keyboards.
PCI relies on parallel transmission that simultaneously sends and receives data across multiple lines. In contrast, the serial transmission data only sends one bit at a time. If both data are moving at the same speed, the parallel transmission appears "faster" due to the transferable data.
PCI relies on parallel transmission that simultaneously sends and receives data across multiple lines.
The problem with a parallel design is that it requires all lines to be synchronized, that the data and frequency are limited. In addition, signals from poor wiring can leak and interfere with neighboring wires, which are crosstalk & # 39; creates what slows down data. To prevent crosstalk & # 39; occur, the PCI lines can no longer extend to a specific length, which is usually shorter than serial connections.
Another problem with PCI in general is that it uses a shared architecture. The PCI host and all connected PCI-based devices share the same address, control and data lines. It offers a problem, as the bus clock suffocates to support the slowest connected device on the bus. Even more, all the wiring needed to support parallel transmissions makes PCI a more expensive design for manufacturers.
Finally, PCI supports up to five external devices, two of which can be exchanged for fixed internal components. The PCI bus has a fixed 64-bit width, which limits the data passing by the bus per second:
|133 MB / s||32-bit||33 MHz||1.0|
|266 MB / s||64-bit||33 MHz||1.0|
|266 MB / s||32-bit||66 MHz||2.1|
|533 MB / s||64-bit||66 MHz||2.1|
In 2003 Intel collaborated with Dell, IBM and HP to create Peripheral Component Interconnect Express. These four companies are part of the Peripheral Component Interconnect Special Interest Group (PCI-SIG), A consortium originally founded in 1992 to control the PCI specification. With exponentially faster, exponentially faster processors and graphics cards, the consortium saw the need for a new system.
PCI Express is different from PCI in that it uses parallel communication and uses dedicated serial connections. A serial connection with a higher clock can match the speed of several parallel lines moving the same charge. As mentioned before, a serial bus costs less to manufacture.
PCI Express looks like an on-board network. It provides private point-to-point access to each connected device and a switch that manages these connections. Supported devices include internal storage, graphics cards, and network components.
A single PCI Express connection contains up to 32 "lanes," depending on the device lock. Each track includes two pairs of wires: one pair that sends data and one pair receives data. For example, a PCI Express connection with just one job has four threads.
|type||Serial connection (s) / path (s)||wires||Bits per cycle in each direction|
The initial PCI Express specification enabled a single-way speed of 250MB per second over a single (x1) lane. PCI Express 2.0 doubles the speed to 500MB per second. Version 3.0 introduced a new coding method that almost doubled the per-line speed.
Typically, with each new revision, the PCI-SIG announces higher speed in "gigate transfers" (GT). This term describes a measurement of data in gigabits transmitted every second. But due to the serial bus data coding, this difficult limit will never be fully utilized.
Gigabits describe a measurement of data in gigabits transmitted every second in each direction simultaneously.
Why? Because pictures, documents and files must is broken down (coded) into binary data for transmission over wires. This data is then reconstructed (decoded) on the receiving end. Part of this binary data is the required encoding / decoding information.
For example, PCIe 1.0 and 2.0 use 8b / 10b coding, which means that 10 bits of data is shifted for every 8 bits. The encoding formula changes to 128b / 130b in the PCIe 3.0 specification, which requires two extra bits for every 128 bits. In other words, much more data is about the connection.
Here's a graph to show gigantic transfers and their translated one-way speed.
|version||Gigantic transfers per second||A job (x1)||Sixteen Lanes (x16)|
|1.x||2.5||250MB / s (2Gbps)||4GB / s (32Gbps)|
|2.x||5||500MB / s (4Gbps)||8GB / s (64Gbps)|
|3.x||8||985MB / s (7.88Gbps)||15.75GB / s (126Gbps)|
|4.x||16||1.969GB / s (15.75Gbps)||31.51 GB / s (252 Gbps)|
|5.x||32||3.938GB / s (31.5Gbps)||63.01GB / s (504Gbps)|
As an example, the graph above shows lanes that move data in one direction. For PCI Express 1.0, a single lane moves two gigabits (2Gb) of unencrypted data every second. The amount increases to 2.5Gb of coded data due to the 8b / 10b coding process.
After PCI Express 1.0, the 2.0 specification followed in 2007, followed by the current standard, PCI Express 3.0, in 2010. The consortium did not complete the PCI Express 4.0 specification until 2017. This timeline guides us to the current major news released during Computex. in June.
officially launched in October 2017, PCI Express 4.0 brings gigabytes up to 16 per second, or 15.75 Gb uncoded data per second. In the seven-year gap between 3.0 and 4.0, we saw huge growth in M.2 SSDs using PCI Express connectivity. Intel's Thunderbolt 3 port promises up to 40 Gb per second transmission speed, thanks to PCI Express lanes.
As processors in core counts climb and GPU's larger textures juggle, all this great data needs a proper transportation. It needs a fast spine to prevent system permeability. PCI Express 4.0 offers faster and faster data pieces to handle new powerful components that require super fast connections.
AMD will July Radeon RX 5700 "Navi" Series. Based on 7nm process technology, this GPU family offers a new Radeon DNA (aka RDNA) graphic core architecture. RDNA supports PCI Express 4.0 and GDDR6 video memory. AMD CEO Lisa Su said RDNA will be playing for the next ten years. GCN will still be around for Vega-based products and high workload applications.
At the time of this publication, we didn't know the real models planned for AMD's RX 5700 family. AMD's Computex keynote has given a glimpse of their performance by a measure of Strange Brigade. The game ran on Nvidia's RTX 2070 and a Radeon RX 5700 card. The result: AMD's card performed "about" 10 percent better than the RTX 2070.
Meanwhile, AMD's Radeon Instinct M150 and MI60 calculate maps for deep learning and high performance computer support PCI Express 4.0. Starting in November 2018, they are based on the "world's first" 7nm GPU, the Vega 20.
AMD's third generation Ryzen 3000 Series desktop CPU family supports PCI Express 4.0. Five desk parts will be available on July 7:
|Cores / Threads||PCIe 4.0 lane (CPU)||PCIe 4.0 lane (chipset)||price|
|Ryzen 9 3900X||12/24||24||16||$ 499|
|Ryzen 7 3800X||8/16||24||16||$ 399|
|Ryzen 7 3700X||8/16||24||16||$ 329|
|Ryzen 5 3600X||6/12||24||16||$ 249|
|Ryzen 5 3600X||6/12||24||16||$ 199|
Note that AMD 40 PCI Express 4.0 lanes advertising its new Ryzen computer CPUs, which is a shared number. The chipset offers 16 PCI Express lanes while the CPU still has 24:
One of the great sales outlets with Ryzen and the AM4 connection is backward compatibility. For example, you don't need a new motherboard when upgrading from a Ryzen 1000 to a Ryzen 3000 chip. Technically, if you wanted the latest features, replacing motherboards is a good idea. But if you just want a newer processor, a motherboard replacement is not necessary.
But to get complete PCI Express 4.0 support, you need a Ryzen 3000 processor and a motherboard on X570. This was not the case earlier this year, as manufacturers enabled PCI Express 4.0 on older motherboards via a BIOS update. However, AMD has returned to this decision and now blocks PCI Express 4.0 updates on everything that exists for X570-based motherboards.
AMD now blocks PCI Express 4.0 updates on all previous motherboards on X570.
The reason? signal Integrity. PCI Express 4.0 requires greater spacing than the PCI Express 3.0 layouts on current motherboards. The new specification also requires transfer and receive tracks on several layers. Tracks are those little copper or aluminum lies running across the motherboard.
"There is no guarantee that older motherboards can reliably execute the stricter signal requirements of Gen4, and we simply can't mix a & # 39; yes, no, maybe & # 39; in the market for all the older motherboards don't have & # 39; says senior technical marketing manager Robert Hallock. "The potential for confusion is too high."
Due to the hardware limitations, AMD's advertised backward compatibility with Ryzen does not include PCI Express 4.0.
Watch the internet and you'll see reports that PCI Express 5.0 is already here. The PCI-SIG announced the availability of the specifications just before Computex in June, which minimizes the PCI Express 4.0 aspect of AMD's great revelation. What's the point of PCI Express 4.0 with a newer specification on the horizon, right?
Technically, PCI Express 5.0 is not here you, the end user. It's here for manufacturers. Twenty-one months will have passed between the 4.0 specification availability and the first real product that uses that specification. With the same pattern we probably won't see hardware based on PCI Express 5.0 until February 2022. If we are lucky, we will see product reviews during the CES 2022 technology convention in Las Vegas.
PCI Express 5.0 supports up to 32 gigate transfers per second. This is 31.5 Gb of uncoded data every second one direction per track. For example, if an x1 graphics card sends and receives data simultaneously, it is combined about 8GB per second. & X39 graphics card can see data transfer of up to 128GB per second.
Given PCI Express 5.0 version 1.0 is now available for manufacturers, we have no information regarding upcoming products. AMD, Epson, Intel, Nvidia, and Silicon Labs are just a few companies that are already doing the new specification.
PCI Express 4.0 is here in physical form to support faster processors, graphics cards, storage devices and more. The roll-out can initially be slow with AMD's Ryzen 3000 and Radeon RX 5700 packaging products. We definitely have enough time for the PCI Express 4.0 market to grow before version 5.0 actually arrives.
But as seen at AMD, support for PCI Express 4.0 can be problematic for older hardware. BIOS-based upgrades will depend on manufacturers and their motherboard designs. However, as is well known, AMD will not activate PCI Express 4.0 on anything older than motherboards on X570.
Currently we do not know Intel's plans for PCI Express 4.0. However, the upcoming 10th-generation "Ice Lake" processors will not support the new specification when they come during the 2019 holiday season.
If you're looking for a new laptop, there are a few "best" guides (and they don't have PCI Express 4.0):